Writing an OS Kernel from Scratch | NIC — From PHY to Socket

Have you ever thought about this process: You type in a URL, how does the data packet get sent from your computer to the server? The CPU hands the data to the network card, and the network card sends the electrical signal to the router — in this chain, the PHY, MAC, DMA ring buffer, and drivers are all interlinked.

This article dissects the network card hardware architecture, driver model (netdev), transmit/receive buffers, multi-queue RSS, and finally gives Linux debugging commands. wandos currently has no network stack; this will be noted separately in the text.

1. NIC Hardware Architecture: PHY + MAC + DMA

A network interface card (NIC) has three core components inside:

  ┌─────────────────────────────────────────────────────────┐
  │                      NIC Chip                            │
  │  ┌─────────┐   ┌─────────┐   ┌─────────────────────┐  │
  │  │   PHY   │◄──│   MAC   │◄──│       DMA           │  │
  │  │(Physical│   │(Link    │   │ (TX/RX Ring Buffer) │  │
  │  │ Layer)  │   │ Layer)  │   └──────────┬──────────┘  │
  │  └────┬────┘   └────┬────┘              │               │
  │       │             │                    │               │
  │   RJ45 Connector MII/RGMII           PCIe BAR          │
  │   (Electrical)  (Chip Internal)    (Memory Mapped)     │
  └───────────────┴───────────────────────┴───────────────┘
                        │
                    PCIe Bus
                        │
                    CPU / RAM

Responsibilities of the three components:

• PHY (Physical Layer): Responsible for encoding/decoding electrical signals (RJ45 → differential signals), Auto-Negotiation (automatic negotiation of speed/duplex)
• MAC (Media Access Control): Responsible for Ethernet frame encapsulation/de-encapsulation (source/destination MAC addresses, type field)
• DMA Controller: Responsible for transferring data directly between RAM and the NIC, without passing through the CPU (“Direct Memory Access”)

2. MII/RGMII Interface: How MAC and PHY Connect

There is a standard set of parallel/serial interfaces between MAC and PHY:

RGMII is currently the most common Gigabit Ethernet interface (onboard NICs like Intel I219-V all use RGMII):

  MAC ────────────────────────────────────────────────── PHY
        ─── 4 bits TX ───→
                    ─── 4 bits RX ←───
        ─── TX clk ───→              ←── RX clk ────
        ─── TX ctrl ─→              ←── RX ctrl ───

3. Transmit/Receive Buffers: TX/RX Ring Buffer… [truncated]