05: Memory Management – User Mode: From brk to malloc — Deep Dive into User-Space Memory Allocators

dean
# 05: Memory Management – User Mode: From brk to malloc — Deep Dive into User-Space Memory Allocators “When a user program calls malloc, how do the kernel and libc work together? This article delves into the brk/mmap system calls, the dlmalloc algorithm, and compares glibc’s implementation details, building an efficient, low-fragmentation user-space memory allocator.”... » read more

358 | Timer: HPET and Clock Interrupts

dean
358 | Timer: HPET and Clock Interrupts Key Insight: The operating system’s sense of time doesn’t come from “watching a clock” — it’s “punched out” by interrupts. Each clock tick tells the kernel that another jiffy has passed — and then it decides who gets to run next. 1. Three Clock Hardware Components The x86... » read more

S01 — DRAM: How One Capacitor and One Transistor Store One Bit

dean
S01 — DRAM: How One Capacitor and One Transistor Store One Bit Key Insight: Behind complex systems, there are often just a few simple physical principles at work. Understanding DRAM starts with the most fundamental Cell. 1. Physical Structure of a DRAM Cell 1.1 What Is DRAM DRAM (Dynamic Random Access Memory) is the main... » read more

B09 — What Happens When Memory Runs Low: kswapd and Page Frame Reclaim

dean
B09 — What Happens When Memory Runs Low: kswapd and Page Frame Reclaim Key Insight: When memory runs tight, the system quietly moves infrequently used data to disk. This is swapping. Sources of Memory Pressure Linux always starts tidying up when memory approaches full. It swaps out infrequently used pages to disk, making room for... » read more

333 – Android Zygote: The Incubator for All App Processes

dean
333 – Android Zygote: The Incubator for All App Processes Series Navigation: 330-Boot Overview | 331-Bootloader | 332-init Process In the previous article, we covered the init process — the first userspace process, responsible for parsing configuration, mounting filesystems, managing properties, and starting key services. The most important of these services is Zygote. Zygote is... » read more

K08 — Inter-Process Shared Memory: shm and mmap(MAP_SHARED)

dean
K08 — Inter-Process Shared Memory: shm and mmap(MAP_SHARED) Key Insight: The fastest inter-process communication is no communication at all — directly share the same block of memory. Three Ways to Share Memory Between Processes Linux supports three mechanisms for inter-process shared memory: 1. System V Shared Memory (shmget/shmat) - Long history, pre-POSIX API - Managed... » read more

B06 — The Manager of Physical Memory: The Buddy System

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B06 — The Manager of Physical Memory: The Buddy System Key Insight: Grouping memory into “buddies” makes both allocation and reclamation efficient. Why Do We Need the Buddy System The OS needs to manage physical memory allocation and reclamation. The simplest approach is bitmap management, but it is inefficient for allocating large blocks. 位图管理的问题: 假设用... » read more

A11 — The Memory Boundary Between User and Kernel: Zero-Copy Technology

dean
A11 — The Memory Boundary Between User and Kernel: Zero-Copy Technology Key Insight: The fastest path from disk to network is to not copy at all. Memory Boundary Between User Mode and Kernel Mode User programs and the kernel have separate address spaces. Interaction requires system calls or specific mechanisms. 用户态和内核态的隔离: 用户地址空间(0x00000000 ~ 0x7FFFFFFFFFFF): -... » read more

B05 — How the MMU Translates Virtual Addresses to Physical Addresses

dean
B05 — How the MMU Translates Virtual Addresses to Physical Addresses Key Insight: Behind every virtual address is a complex translation process. And you never perceive it. What is an MMU The MMU is a hardware unit on the CPU chip. It translates Virtual Addresses (VA) to Physical Addresses (PA). MMU 在系统中的位置: CPU Core Memory... » read more

Understanding Low-Level Principles – Memory Series | S05 | Bank, Row, Column — How a Memory Address is Step-by-Step Mapped to a Specific Cell

dean
Understanding Low-Level Principles – Memory Series | S05 | Bank, Row, Column — How a Memory Address is Step-by-Step Mapped to a Specific Cell Key Insight: Translating an address into a physical access requires many layers of abstraction. Understanding Bank internal structure is the key to understanding DDR performance. 1. DRAM Chip Internal Structure: The... » read more