Long Article 101: Memory Management – Boot Phase: Memory Layout from Real Mode to Paging
“The kernel code is linked at 1MB+, but the CPU starts in real mode — today we unveil the boot phase memory layout and see how the kernel safely enables paging!”
In the OS boot process, memory management is the first challenge. The CPU powers on in Real Mode, only able to access memory below 1MB, but kernel code is linked above 1MB (e.g., 0x100000).
More complex still: before paging is enabled, all addresses are physical; after paging is enabled, addresses become virtual, translated by hardware automatically.
Today, we will:
✅ Analyze the boot phase memory layout
✅ Understand the role of temporary page tables (Identity Mapping)
✅ Master the complete flow for safely enabling paging
✅ Obtain physical memory size information
Memory Layout Overview (0x00000000 – 0xFFFFFFFF)
Key regions:
| Address | Usage | Owner |
|---|---|---|
| 0x00000000 – 0x00000400 | Interrupt Vector Table | BIOS |
| 0x00007C00 – 0x00007DFF | Boot sector (512B) | Bootloader |
| 0x00008000+ | Multiboot info from GRUB | GRUB |
| 0x0009FC00+ | MP table (multi-core CPU info) | BIOS |
| 0x00100000+ | Kernel code/data | Your kernel |
| Below 1MB | BIOS reserved | BIOS |
The kernel must never use memory below 1MB! Otherwise it would overwrite BIOS data and crash.
Why Link the Kernel at 1MB+?
Historical reasons:
- Real mode limit: 20-bit address lines → max 1MB (0x00000 – 0xFFFFF)
- Protected mode need: 32-bit CPU needs larger address space
- GRUB convention: Multiboot spec requires kernel loaded above 1MB
Technical advantages:
- Avoid BIOS conflicts: below 1MB is BIOS “territory”
- Simplify memory management: above 1MB is “clean” physical memory
- Page alignment: 1MB = 256 × 4KB pages, convenient for page table alignment
0x100000 (1MB) is the “safe starting point” for x86 kernels!
Temporary Page Tables: Identity Mapping
Before paging is enabled, the CPU accesses physical addresses. After enabling, it accesses virtual addresses via page table translation.
But kernel code is already linked at high addresses (e.g., 0xC0000000). How does it avoid crashing the instant paging is enabled?
Answer: Temporary Page Tables (Identity Mapping)!
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