012. The 80486 Microprocessor: Architecture and Features tags: – CPU Architecture – x86 Processor – Computer History – Microprocessor Technology – Hardware Design

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Slight Improvements to the 80486 The 80286 added segmented memory management and protected mode. The 80386 added paged memory management. These both had an enormous influence on modern operating systems. Because after the improvements in the 386, no more changes of such magnitude took place — the 80386 became a timeless classic. So much so... » read more

010. Paged Memory Management in the 80386

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Paged Memory Management in the 80386 INTEL introduced the 80386 chip in 1985. It was the first 32-bit microprocessor in the 80×86 series, and its manufacturing process was also a major advance. Compared with the 80286, the 80386 contained 275,000 transistors. Its clock frequency was initially 12.5 MHz and was later increased to 20 MHz,... » read more

009. The Evolution of the x86 Computer Architecture” tags: [“x86”, “architecture evolution”, “processor”, “compatibility”]

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The Evolution of the x86 Computer Architecture We know the first x86 chip was the 8086, followed by the 80286, 80386, 80486, Pentium… This article uses many images to walk everyone through the development history of x86 computers, so you can understand when each part of today’s computers was added, and what historical event each... » read more

008. 8086 Interrupt Handling

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8086 Interrupt Handling Interrupt Vector Table The 8086 supports 256 interrupts, each requiring a corresponding Interrupt Service Routine (ISR). The starting addresses (CS:IP) of the 256 ISRs are arranged in order to form an Interrupt Vector Table (IVT). Each interrupt vector consists of 4 bytes. These 4 bytes specify the segment value (assigned to CS)... » read more

007. The 80286 Task State Segment and Task Switching

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The 80286 Task State Segment and Task Switching Call gate descriptors are used for system calls Interrupt gate descriptors are essentially a new interrupt vector table Task state descriptors are used to save task state during task switching Tasks An example of a task is a process. An example of task switching is process switching.... » read more

006. The 80286 Call Gate Descriptor

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The 80286 Call Gate Descriptor In addition to segment descriptors used to restrict memory access, the 80286 also has gate descriptors used to restrict transfers of program control. The 80286 has four kinds of gate descriptors: call gate descriptors, interrupt gate descriptors, trap gate descriptors, and task gate descriptors. These descriptors are also stored in... » read more

005. A Detailed Look at the 80286

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Overview An x86 CPU operates in real mode, protected mode, virtual 8086 mode, system management mode, and so on. An x86 CPU can only enter real mode at startup. Once it has switched to protected mode, it can never return to real mode. Real Mode and Protected Mode Put simply, real mode is the mode... » read more

004. CPU Cache Architecture

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Bridging the Gap The purpose of cache is to bridge the speed gap between memory and the CPU. CPU instructions execute in less than a nanosecond, while memory-access latency ranges from a dozen to several dozen nanoseconds. For a single memory access, the CPU must therefore wait for dozens or even hundreds of clock cycles,... » read more

003. Wear Leveling in NAND Flash (wear-leveling)

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1. The Importance of Wear Leveling The purpose of wear leveling is to prevent some blocks from going bad too early, thereby reducing reliability. It tries to distribute erase operations as evenly as possible across different blocks so that they all reach the end of their lifespan at roughly the same time. Flash storage is... » read more

002. NAND Flash Fundamentals

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1. Packaging In a NAND flash chip, a single silicon wafer packaged inside is called a Die. A Die may internally be divided into two planes, each called a Plane. A Plane contains multiple Blocks, and each Block is further divided into multiple Pages. Usually people do not concern themselves with the Die and Plane,... » read more

001. The x86 Boot Process

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1.1 The CPU’s First Instruction Borrowing an image from a friend online, it walks through the flow from x86 system boot all the way to the Linux kernel. From the diagram we can see that after power-on, the CPU fetches and executes its first instruction from address CS:IP = FFFF:0000. This instruction belongs to the... » read more

Debian apt Stuck on “Waiting for headers”: A Root-Cause Field Guide

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Debian apt Stuck on “Waiting for headers”: A Root-Cause Field Guide You run sudo apt update and it freezes. The progress bar stops at 0% [Waiting for headers] or 23% [Waiting for headers], the cursor blinks for ten seconds, then thirty, then two minutes. Eventually either the connection times out and you get Connection failed,... » read more

VMware Workstation Pro: Ubuntu 26.04 LTS Install Guide

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title: “VMware Workstation Pro: Ubuntu 26.04 LTS Install Guide” date: 2026-07-12 category: linux-software tags: [VMware, Workstation, Virtualization, Ubuntu, Linux] VMware Workstation Pro: Ubuntu 26.04 LTS Install Guide If you’ve ever needed to run a Windows VM alongside your Linux desktop, test a bleeding-edge distro without bricking your main install, or just want a private lab... » read more

systemd: A Practical Field Reference for Linux Operators

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systemd: A Practical Field Reference for Linux Operators Most Linux distributions since 2015 ship with systemd as the default init system. It replaced the SysV init scripts that came before — and brought a unified configuration model, dependency handling, logging, and a toolchain for managing user services. This is a working reference. Not the full... » read more

Why `ftp` Still Ships in Your Linux Box (And What It’s For in 2026)

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Why ftp Still Ships in Your Linux Box (And What It’s For in 2026) Try which ftp on a fresh Debian 12 install. It’s there. Ask why — and you’ll get the same short answer every sysadmin gives: “It’s shipped because /usr/bin/ftp(1) is in POSIX. Nobody actually uses it anymore. We use SSH for everything.”... » read more

Tailscale: WireGuard Mesh Networking for the Rest of Us

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Tailscale: WireGuard Mesh Networking for the Rest of Us So you’re at a coffee shop, you need to SSH into your home server, and your roommate’s printer needs to reach your NAS across two different apartments. Three different networks. Three different NAT boxes. The classic VPN setup would route everything through one central server —... » read more

Terraria on Linux: How to Run It Without Losing Your Mind

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Terraria on Linux: How to Run It Without Losing Your Mind If you’ve ever typed “Terraria Linux” into a search engine, you’ve probably bounced between forum posts from 2014, an Arch Wiki page that hasn’t been updated in four years, and at least three YouTube tutorials titled “EASIEST way to play Terraria on Linux!!1!” with... » read more